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  hv850 features ? no external components required when using an external el clock frequency ? el frequency can be set by an external resistor ? low noise ? dc to ac converter ? drives up to 5.0nf load (approx. 1.5in 2 lamp) ? output voltage regulation ? enable function ? el lamp dimming applications ? cell phone keypads and displays ? transceivers ? mp3 players ? watches ? pagers ? measurin g instruments/gauges general description the supertex hv850 is a high voltage electroluminescent (el) lamp driver ic. it is designed to drive el lamps of up to 1.5in 2 , with capacitive values up to 5.0nf. the hv850 converts a low voltage dc input to a high voltage ac output across an el lamp. it uses a charge pump scheme to boost the input voltage, eliminating the need for external inductors, diodes, and high voltage capacitors, components commonly found in conventional topologies. the charge pump circuit discharges its energy into an el lamp through a high voltage h-bridge. once the voltage reaches its regulated limit, it is turned off to conserve power. the el lamp is then discharged to ground and the h-bridge changes state to allow the charge pump to charge the el lamp in the opposite direction. the el lamp frequency can be set either by an external resistor, r el , or by applying an external clock, where the clock frequency is divided by 128 to set the el lamp frequency. typical application circuits (for v dd = 3.4v to 4.2v only) high voltage, low noise, inductorless el lamp driver el lamp fr equenc y set by an external cl oc k v dd el lamp c dd v dd + - 8 7 6 5 vdd vb rel gnd va 1 2 3 4 en clkin clken hv850 v dd gnd v dd = on gnd = off el lamp fr equenc y set by r el v dd = on gnd = off el lamp c dd v dd + - r el 8 7 6 5 vdd vb rel gnd va 1 2 3 4 en clkin clken hv850 supertex inc. supertex inc.  1235 bordeaux drive, sunnyvale, ca 94089  t el: 408-222-8888  www .supertex.com
2 hv850 ordering information device package options 8-lead msop 3.00x3.00mm body 1.10mm height (max) 0.65mm pitch hv850 HV850MG-G -g indicates package is rohs compliant (green) absolute maximum ratings parameter value v dd , supply voltage -0.5v to 4.5v operating temperature -25c to +85c storage temperature -65c to +150c power dissipation 300mw stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifcations is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. pin confguration vdd rel en clken vb gnd va clkin 5 6 7 8 4 3 2 1 recommended operating conditions sym parameter min typ max units conditions v dd input voltage 3.0 - 4.2 v --- f el el lamp frequency 50 - 500 hz --- c load el lamp capacitance 0 - 5.0 nf --- t a operating temperature -25 - +85 o c --- electrical characteristics (unless otherwise specifed v dd = 3.5v, t a = 25c) sym parameter min typ max units conditions i ddq quiescent current - - 150 na en = 0v v a or v b peak output voltage 63 70 77 v no load. v a - v b peak to peak output voltage 126 140 154 v f el el lamp frequency 225 250 275 hz r el 0ru/. n+ i dd operating current - - 16 ma see figure 1, v dd = 3.5v, r el 0 /rdg q)n v a or v b peak output voltage 54 - 74 v v a - v b peak to peak output voltage 108 - 148 v f el el lamp frequency 250 294 338 hz t rout output voltage rise time 1.5 - - ms f el = 250hz, 1in 2 odpswrriqdodoxh product marking l = lot number yy = year sealed ww = week sealed = ?green? packaging h850 llll yyww top marking bottom marking 8-lead msop (mg) 8-lead msop (mg) (top view) package may or may not include the following marks: si or supertex inc.  1235 bordeaux drive, sunnyvale, ca 94089  t el: 408-222-8888  www .supertex.com
3 hv850 figure 1: typical application circuit (without enable function) load r el (m) v dd (v) i dd (ma) peak v a (v) f el (hz) 3.3nf + 1.0k 1.5 3.0 8.9 53 294 3.5 10.2 61 4.0 10.4 66 note: c dd )r(5 logic inputs 8ohvvrwhulvhvshflhg dd a = 25c) sym parameter min typ max units conditions v il input logic low voltage 0 - 0.5 v --- v ih input logic high voltage 2.0 - v dd v --- i il input logic low current - - 1.0 a --- i ih input logic high current - - 1.0 a --- en rise enable input rise time (for delay turn on) 0.01 - 10 ms using external r-c circuit, see figure 2. en fall enable input fall time (for delay turn off) 10 - 5.0 s c in logic input capacitance - - 10 pf --- block diagram feedback v dd rel vdd va vb en gnd clkin clken v dd mosfet full bridg e el oscillator high voltage level trans- lators capacitor charge pump circuit v sense el lamp c dd v dd + - r el 8 7 6 5 vdd vb rel gnd va 1 2 3 4 en clkin clken hv850 supertex inc.  1235 bordeaux drive, sunnyvale, ca 94089  t el: 408-222-8888  www .supertex.com
4 hv850 v dd = 3.5v, f el = 250.0hz; load = 3.3nf+1.0k; i dd = 9.19ma, ch1 20v/div, 1.0ms/div typical output waveform lamp size (in 2 ) r el (m) v dd (v) i dd (ma) peak v a (v) f el (hz) brightness (cd/m 2 ) 1.0 1.65 3.0 8.4 53 250 7.31 3.5 9.4 62 10.35 4.0 9.9 66 12.62 0.5 2.0 3.0 5.5 62 210 11.54 3.5 5.3 68 14.33 4.0 4.9 68 14.90 1.0 3.3 3.0 5.6 62 128 8.55 3.5 5.4 67 10.29 4.0 5.0 68 10.94 0.5 3.3 3.0 4.6 64 128 8.25 3.5 4.1 68 9.62 4.0 3.8 68 9.95 1.0 4.7 3.0 4.8 64 89 6.02 3.5 4.4 68 7.5 4.0 5.0 68 10.94 typical performance supertex inc.  1235 bordeaux drive, sunnyvale, ca 94089  t el: 408-222-8888  www .supertex.com
5 hv850 figure 3: independent programmable output frequency (f el ) (for v dd = 3.4v to 4.2v only) figure 2: push button turn on with delay turn off (for v dd = 3.4v to 4.2v only) el lamp c dd r el + v dd - c rc time constant will set turn off delay time push button turn on 8 7 6 5 vdd vb rel gnd va 1 2 3 4 en clkn clken hv850 r el lamp c dd + v dd - v dd = on gnd = off v dd gnd 8 7 6 5 vdd vb rel gnd va 1 2 3 4 en clkin clken hv850 el lamp dimming using pwm el lamp dimming can be achieved by applying a pwm signal to the enable pin. the pwm signal duty cycle is proportional to the lamp brightness. this is done by pulse skipping the output pulses. the pwm frequency should be kept below the el frequency but above 50hz to avoid fickering. figure 4: pwm dimming circuit (for v dd = 3.4v to 4.2v only) el lamp c dd v dd + - r el 8 7 6 5 vdd vb rel gnd va 1 2 3 4 en clkin clken hv850 v dd gnd pwm signal supertex inc.  1235 bordeaux drive, sunnyvale, ca 94089  t el: 408-222-8888  www .supertex.com
6 hv850 pin # pad description 1 vdd input supply voltage pin. 2 rel an external resistor to vdd will set the el lamp frequency. the el lamp frequency is inversely proportional to the resistor value. 3 en enable input pin. logic high will turn the device on. an external r-c circuit can be added for a delayed turn off. logic low will turn the device off only for v dd = 3.4v to 4.2v. for v dd lower than 3.4v, logic low will not turn the device off. 4 clkin logic input pin. an external logic clock applied to this pin can be used to set the el lamp frequency (see figure 3). this is useful for applications requiring the el lamp to be synchronized to a system clock. connect to ground when not in use. 5 clken logic input pin. logic high will cause the el lamp frequency to be set by the clkin input. logic low will cause the el lamp frequency to be set by the external r el resistor. 6 gnd ic ground pin. 7 vb el lamp driver output pin. the el lamp is connected across va and vb terminals. 8 va el lamp driver output pin. the el lamp is connected across va and vb terminals. pin description supertex inc.  1235 bordeaux drive, sunnyvale, ca 94089  t el: 408-222-8888  www .supertex.com
7 hv850 (the package drawing(s) in this data sheet may not refect the most current specifcations. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv850 d062209 1 8 seating plane gauge plane l l1 l2 e e1 d e b a a2 a1 seating plane a a to p v iew side v iew vi ew a-a vi ew b vi ew b 1 (x4) note 1 (index area d/2 x e1/2) symbol a a1 a2 b d e e1 e l l1 l2 1 dimension (mm) min 0.75* 0.00 0.75 0.22 2.80* 4.65* 2.80* 0.65 bsc 0.40 0.95 ref 0.25 bsc 0 o 5 o nom - - 0.85 - 3.00 4.90 3.00 0.60 - - max 1.10 0.15 0.95 0.38 3.20* 5.15* 3.20* 0.80 8 o 15 o jedec registration mo-187, variation aa, issue e, dec. 2004. * this dimension is not specifed in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-8msopmg, version h041309. note: 1. a pin 1 identifer must be located in the index area indicated. the pin 1 identifer can be: a molded mark/identifer; an embedded metal marker; or a printed indicator. 8-lead msop package outline (mg) 3.00x3.00mm body, 1.10mm height (max), 0.65mm pitch supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. (website: http//www .supertex.com) ?201 1 supertex inc. a ll rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com
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